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堀尾 喜彦 Yoshihiko Horio

国際会議論文(査読付き)

  1. Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, and Jordi Madrenas, "Ultra-low power analog CMOS implementation of spiking neural networks for reservoir computing applications," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 171-172, online, December 12-15, 2022.
  2. Yushi Kikuchi, Yoshihiko Horio, Shunsuke Fukami, and Hiroyasu Ando, "Tunnel conductance modeling of spintronics devices based on device temperature dynamics," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 139-142, online, December 12-15, 2022.
  3. Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, and Jordi Madrenas, "A fully analog CMOS implementation of a two-variable spiking neuron in the subthreshold region and its network operation," in Proceedings of International Joint Conference on Neural Networks, #792 (7 pages), July 19-23, 2022.
  4. Takemori Orima and Yoshihiko Horio, "Preliminary experimental results of chaotic neural network reservoir using improved cyclic neuron circuit for stacked 3D integrated circuit," in Proc. The 2021 Nonlinear Science Workshop, p. NLSW-9, Online, December 6-8, 2021.
  5. Yoshihiko Horio, Kiyotaka Naoe, Shigeo Sato, Yasunori Yamanouchi, Yasunari Takaura, Mitsuyuki Yamaguchi, Masato Morishima, and Ayumi Hirano-Iwata, "Designing the human-centric IoT society: Cooperative industry-academic strategies for creative future connection," in Proc. The 2021 Nonlinear Science Workshop, p. NLSW-0, Online, December 6-8, 2021.
  6. Yoshihiko Horio, Takemori Orima, Koji Kiyoyama, and Mitsumasa Koyanagi, "Implementation of a chaotic neural network reservoir on a TSV/μ bump stacked 3D cyclic neural network integrated circuit," in Proc. 2021 IEEE International 3D System Integration Conference, paper number 5b (4 pages), Online, November 16-19, 2021. DOI: 10.1109/3DIC52383.2021.9687614
  7. Koji Kiyoyama, Yoshihiko Horio, Takafumi Fukushima, Hiroyuki Hashimoto, Takemori Orima, and Mitsumasa Koyanagi, "Design for 3-D stacked neural network circuit with cyclic analog computing," in Proc. 2021 IEEE International 3D System Integration Conference, paper number 5a (4 pages), Online, November 16-19, 2021. DOI: 10.1109/3DIC52383.2021.9687608
  8. Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, and Jordi Madrenas, "A subthreshold spiking neuron circuit based on the Izhikevich model," in Proc. 30th International Conference on Artificial Neural Networks, pp. 177-181, Bratislava, Slovakia, September 14–17, 2021. DOI: 10.1007/978-3-030-86383-8_14.
  9. Dien Hoang and Yoshihiko Horio, "FPGA implementation of echo state network with time-switched multi-frame layer for discrete speech recognition," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 365-368, online, March 2-3, 2021.
  10. Keisuke Fukuda, Yoshihiko Horio, Takemori Orima, and Koji Kiyoyama, "Cyclic reservoir neural network circuit for 3D IC implementation," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 81-84, online, Nov. 16-19, 2020.
  11. Yushi Kikuchi, Yoshihiko Horio, Aleksandr Krenkov, and Shunsuke Fukami, "Mathematical modeling of neuron/synapse-like spintronics devices," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 77-80, online, Nov. 16-19, 2020.
  12. Shigeo Sato, Yuki Tamura, Satoshi Moriya, Hideyuki Yamamoto, Masao Sakuraba, Yoshihiko Horio, and Jordi Madrenas, "Analog CMOS implementation of a spiking neuron circuit for edge computing," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, p. 76, online, Nov. 16-19, 2020.
  13. Maakito Inoue, Keisuke Fukuda, and Yoshihiko Horio, "Switched-Capacitor Circuit Implementation of the Chaotic Neural Network Reservoir," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 275-278, Honolulu, Hawaii, U.S.A., Feb. 28-March 2, 2020.
  14. Yoshihiko Horio, Aleksandr Kurenkov, Shunsuke Fukami, and Hideo Ohno, "Spin-orbit torque neuron and synapse devices for brainmorphic computing," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, p. 78, Kuala Lumpur, Malaysia, Dec. 2-6, 2019.
  15. Aren Shinozaki, Takaya Miyano, and Yoshihiko Horio, "Chaotic time series prediction by a noisy echo state network," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 81-84, Kuala Lumpur, Malaysia, Dec. 2-6, 2019.
  16. Kiyotaka Miyauchi, Yoshihiko Horio,Takaya Miyano, and Kenichiro Cho,"Design method for nonlinear LUT in pseudorandom number generator based on augmented Lorenz map," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 444-447, Kuala Lumpur, Malaysia, Dec. 2-6, 2019.
  17. Shigeo Sato, Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Yoshihiko Horio, and Jordi Madrenas, "A spiking neuron MOS circuit for low-power neuromorphic computation," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, p. 80, Kuala Lumpur, Malaysia, Dec. 2-6, 2019.
  18. Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Yoshihiko Horio, and Shigeo Sato, "An Izhikevich model neuron MOS crcuit for low voltage operation," in Proceedings of 28th International Conference on Artificial Neural Networks, pp. 718-723, DOI:10.1007/978-3-030-30487-4_55, Munich, Germany, September 17–19, 2019.
  19. Aren Shinozaki, Kota Shiozawa, Kazuki Kajita, Takaya Miyano, and Yoshihiko Horio, "Short-term prediction of hyperchaotic flow using echo state network," in Proceedings of The International Joint Conference on Neual Networks, paper no. N-20022 (5 pages), Budapest, Hungary, July 14-19, 2019.
  20. Yoshihiko Horio, "Chaotic neural network reservoir," in Proceedings of The International Joint Conference on Neual Networks, paper no. N-19290 (5 pages), Budapest, Hungary, July 14-19, 2019.
  21. Yoshihiko Horio, "A brainmorphic computing hardware paradigm through complex nonlinear dynamics," in Proceedings of The 5th International Conference on Applications in Nonlinear Dynamics, August 5-9, 2018; in Understanding Complex Systems, V. In, P. Longhini, and A. Palacios, eds., Springer, ISBN 978-3-030-10891-5, 2019.
  22. Yoshihiko Horio, "Towards a brainmorphic computing paradigm and a brain/body whole organism computation system," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 703-192, Honolulu, Hawaii, U.S.A., March 4-7, 2018.
  23. Yoshihiko Horio, "Towards a neuromorphic computing hardware system," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 189-192, Dec. 4-7, 2017.
  24. Takemori Orima, and Yoshihiko Horio, "An improved formulation of feature values in passive reflectionless transmission-line model based on the cochlea," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 128-131, Dec. 4-7, 2017.
  25. Yoshihiko Horio and Takayoshi Fujino, "IC prototyping of a switched-current A/D converter circuit based on the golden ratio encoder," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 120-123, Dec. 4-7, 2017.
  26. W.A. Borders, H. Akima, S. Fukami, S. Moriya, S. Kurihara, A. Kurenkov, Yoshihiko Horio, S. Sato, and H. Ohno "An artificial neural network with an analogue spin-orbit torque device," in Proceedings of the IEEE International Magnetics Conference, INTERMAG Europe 2017, Dublin, Ireland, April 24-28, 2017.
  27. Takemori Orima, and Yoshihiko Horio, "An improved parameter value optimization technique for the reflectionless transmission-line model of the cochlea," in Proceedings of the 2017 International Conference on Artificial Life and Robotics, pp. 136-139, Jan. 20, 2017.
  28. Takayoshi Fujino, and Yoshihiko Horio, "A switched-current golden ratio encoder circuit," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 526-529, Nov. 2016.
  29. Masahiro Ogawa, Yoshihiko Horio, Natsuhiro Ichinose, Motomasa Komuro, "Stabilization of unstable quasi-periodic solutions in asymmetric chaotic neural network circuits -Numerical simulations and circuit experiments-," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 844-847, Dec. 2015.
  30. Fumiya Kawaguchi, Yoshihiko Horio, "An implementation technique of a β-A/D converter with a unity-gain buffer," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 507-510, Dec. 2015.
  31. Takemori Orima, Yoshihiko Horio, and Tohru Kohda, "A parameter value optimization technique for a reflectionless transmission-line model of the cochlea," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 503-506, Dec. 2015.
  32. Fumiya Kawaguchi and Yoshihiko Horio, "Preliminary measured results from a β-encoder integrated circuit," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 898-901, Sept. 2014.
  33. Akihitio Toyoda, Yoshihiko Horio, and Kazuyuki Aihara, "Synchronous exponential chaotic tabu search for analog-digital hybrid parallel hardware systems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 370-373, Sept. 2013.
  34. Takahito Mitsui, Seiji Uenohara, Yoshihiko Horio, and Kazuyuki Aihara, "Anomalous diffusion generated by quasiperiodically forced maps with strange nonchaotic attractors," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 322-325, Sept. 2013.
  35. Akihitio Toyoda, Yoshihiko Horio, and Kazuyuki Aihara, "A synchronous exponential chaotic tabu search algorithm in quadratic assignment problems for parallel hardware implementation with electronic circuits," in Abstracts of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, p. 39, July 2013.
  36. Tomoaki Yorozuya, Mikio Hasegawa, Yoshihiko Horio, and Kazuyuki Aihara, "Effectiveness of Markov codes with negative autocorrelation and Gaussian chip waveforms in FD/S3," in Abstracts of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, p. 38, July 2013.
  37. Mitsuhiro Nakamura, Yoshihiko Horio, Tohru Kohda, and Kazuyuki Aihara, "An improved fully-differential A/D converter circuit based on the negative β-map," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 620-623,  March 2013.
  38. Kousuke Yamauchi, Yoshihiko Horio, and Kazuyuki Aihara, "A compact dynamic logic element with chaotic state transitions," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 667-680, March 2013.
  39. Tomoaki Yorozuya, Hisashi Watanabe, Mikio Hasegawa, Yoshihiko Horio, and Kazuyuki Aihara, "Effectiveness of the Markov codes with negative correlation in FD/S3," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 229-232, March 2013.
  40. Akihito Toyoda, Yoshihiko Horio, and Kazuyuki Aihara, "A neuron selection method for parallel exponential chaotic tabu search hardware in quadratic assignment problems," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 61-64, March  2013.
  41. Yoshimasa Narumiya, Hisashi Watanabe, Tomoaki Yorozuya, Mikio Hasegawa, Yoshihiko Horio, and Kazuyuki Aihara, "Performance evaluation of FD/S3 for frequency synchronization using timing division integration," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 237-240, March 2013.
  42. Hisashi Watanabe, Yoshimasa Narumiya, Mikio Hasegawa, Yoshihiko Horio, and Kazuyuki Aihara, "Performance evaluation of timing synchronization by frequency domain integration in TD/SSS," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 233-236, March 2013.
  43. Tsubasa Kawai, Kantaro Fujiwara, Kenya Jin'no, Yoshihiko Horio, and Tohru Ikeguchi, "Synchronization induced by common noise in electric chaotic oscillators," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 121-124, March 2013.
  44. Tsubasa Kawai, Wataru Kurebaeshi, Kantaro Fujiwara, Kenya Jin'no, Yoshihiko Horio, and Tohru Ikeguchi, "Synchronization induced by common colored noise on electric circuits," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 348-351, Oct. 2012.
  45. Hirotaka Fukushima, Yoshihiko Horio, and Kazuyuki Aihara, "Switched-capacitor circuit implementation of the golden ratio encoder -Effects of offset voltage and finite gain of the op-amp-," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 453-456, March 2012.
  46. Mitsuhiro Nakamura, Yoshihiko Horio, Tohru Kohda, and Kazuyuki Aihara, "An implementation of an A/D converter based on the negative β-map," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 301-304, March 2012.
  47. Masanori Ikeda, Yoshihiko Horio, and Kazuyuki Aihara, "Improved dynamical logic element with chaotic state transitions using switched-capacitor chaotic neuron circuit," in Proceedings of RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 13-16, March 2012.
  48. Yoshihiko Horio, "b-expansion's attractors observed in A/D converters," in Book of Abstract, IUTAM Symposium on 50 Years of Chaos: Applied and Theoretical, pp. 90-91, Nov. 2011.
  49. Seiji Uenohara, Yoshihiko Horio, Takahito Mitsui, and Kazuyuki Aihara, "Experimental observations of strange non-chaotic attractors from a chaotic neuron integrated circuit," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 232-235, Sept. 2011.
  50. Kazuyoshi Ishimura, Jun Takahashi, Yoshihiko Horio, and Kazuyuki Aihara, "Dynamic logic circuit with chaotic transition using switched-capacitor chaotic neuron circuits," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 619-622, Sept. 2011.
  51. Takashi Morie, Daisuke Atuti, Kazuki Ifuku, Yoshihiko Horio, and Kazuyuki Aihara, "A CMOS nonlinear-map circuit array for threshold-coupled chaotic maps using pulse-modulation approach," in Proceedings of European Conference on Circuit Theory and Design, pp. 126-129, Aug. 2011.
  52. Yusuke Tsubaki, Yoshihiko Horio, and Kazuyuki Aihara, "Forced chaos generator with switched CMOS active inductance," in Proceedings of European Conference on Circuit Theory and Design, pp. 640-643, Aug. 2011.
  53. Tetsuo Kawamura, Yoshihiko Horio and Mikio Hasegawa, "Mutual information analysis of chaotic neurodynamics driven by neuron selection methods in synchronous exponential chaotic tabu search for quadratic assignment problems," Neural Information Processing -Theory and Algorithms-, K.W. Wong, B. Sumudo, U. Mendis, and A. Bouzerdoum eds., Lecture Notes in Computer Science, vol. LNCS 6433, part 1, Springer, pp. 49-57, Nov. 2010.
  54. Yoshihiko Horio, Kenya Jin'no, Tohru Kohda, and Kazuyuki Aihara, "Circuit implementation of an A/D converter based on the negative β-map with a discrete-time integrator," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 265-268, Sept. 2010.
  55. Kazuaki Shibata and Yoshihiko Horio, "Double-assignment method driven by chaotic neurodynamics for quadratic assignment problems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 301-304, Sept. 2010.
  56. Yusuke Tsubaki, Munehisa Sekikawa, and Yoshihiko Horio, "Forced chaos generator with CMOS variable active inductor circuit," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 342-345, Sept. 2010.
  57. Yusuke Sakamoto and Yoshihiko Horio, "Slide-and-insert assignment method with chaotic dynamics for quadratic assignment problems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 382-385, Sept. 2010.
  58. Yoshihiko Horio, Kenya Jin'no, Tohru Kohda, and Kazuyuki Aihara, "Circuit implementation of an A/D converter based on the scale-adjusted β-map using a discrete-time integrator," in Proceedings IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 110-113, May 2010.
  59. Kenya Jin'no, Yoshihiko Horio, Ryosuke Domae, and Kazuyuki Aihara, "Novel multi-hysteresis VCCS multi-scroll chaotic oscillators," in Proceedings IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 134-137, June 2009.
  60. Hiroyasu Ando, Aki Nakano, Yoshihiko Horio, and Kazuyuki Aihara, "Adaptive feedback control of chaotic neurodynamics in analog circuits," in Proceedings of IEEE International Symposium on Circuits and Systems, pp. 2621-2624, May 2009.
  61. Kenya Jin'no, Yoshihiko Horio, Ryosuke Domae, Kazuyuki Aihara, "A multi-hysteresis VCCS and its application to multi-scroll chaotic oscillators," in Proceedings of IEEE International Symposium on Circuits and Systems, pp. 2850-2853, May 2009.
  62. Akihiko Shirakuma, Yoshihiko Horio, and Kazuyuki Aihara, "An improved neuron selection technique in an exponential chaotic tabu search hardware system for large-scale quadratic assignment problems," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 149-152, March  2009.
  63. Aki Nakano, Hiroyasu Ando, Yoshihiko Horio, and Kazuyuki Aihara, "Measurement of switched-capacitor chaotic neuron circuit controlled by adaptive feedback method," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 209-212, March 2009.
  64. Yoshihiko Horio and Kazuyuki Aihara, "A hybrid computation with analog chaotic neuro-dynamics -Combinatorial optimization using interaction between conscious and subconscious processes-," in Proceedings of 4th Joint International Symposium on Soft Computing and Intelligent Systems and 9th International Symposium on Advanced Intelligent Systems, pp. 340-345, Sept. 2008.
  65. Yoshihiko Horio and Kazuyuki Aihara, "Combinatorial optimization with physical chaotic neuro-dynamics through conscious and subconscious process," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 235-238, Sept. 2008.
  66. Takuya Hamada, Yoshihiko Horio, Ryosuke Domae, Kenya Jin'no, and Kazuyuki Aihara, "A fully-differential multi-hysteresis two-port VCCS chaotic oscillator integrated circuit," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 568-571, Sept. 2008.
  67. Naoto Yokota, Yoshihiko Horio, Mikio Hasegawa, and Kazuyuki Aihara, "A synchronous exponential chaotic tabu search for quadratic assignment problems," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 212-215, March 2008.
  68. Takahisa Ogino, Yoshihiko Horio, and Kazuyuki Aihara, "Analysis of chaotic neural network through mutual information in solving quadratic assignment problems," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 216-219, March 2008.
  69. Takuya Hamada, Yoshihiko Horio, and Kazuyuki Aihara, "An IC implementation of a hysteresis two-port VCCS chaotic oscillator," in Proceedings of European Conference on Circuit Theory and Design, pp. 926-929, Aug. 2007.
  70. Akihiko Shirakuma, Yoshihiko Horio, and Kazuyuki Aihara, "An improved solution construction method with solution feedback for quadratic assignment problems," in Proceedings of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 58-61, July 2007.
  71. Kenichi Kawamura, Yoshihiko Horio, and Kazuyuki Aihara, "Measurements from integrated chaos circuits with floating-gate MOSFETs," in Proceedings of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 66-69, July 2007.
  72. Takuya Hamada, Yoshihiko Horio, and Kazuyuki Aihara, "Experimental observations from an integrated hysteresis two-port VCCS chaotic oscillator," in Proceedings of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 237-240, July 2007.
  73. Takahisa Ogino, Yoshihiko Horio, and Kazuyuki Aihara, "An analysis of high-dimensional associative dynamics observed from an analog chaotic neuro-computer hardware system," in Proceedings of IEEE International Workshop on Nonlinear Dynamics of Electronic Systems, pp. 297-300, July 2007.
  74. Yoshihiko Horio and Kazuyuki Aihara, "Real-number computation through high-dimensional analog physical chaotic neuro-dynamics," in Proceedings of Unconventional Computation: Quo Vadis?, p. 16, March 2007.
  75. Yoshihiko Horio and Kazuyuki Aihara, "Physical chaotic neuro-dynamics and optimization," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 499-502, Sept. 2006.
  76. Naoki Ogawa, Yuya Ohashi, Yoshihiko Horio, and Kazuyuki Aihara, "Improved parallel processing hardware algorithm for large-scale quadratic assignment problems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 1079-1082, Sept. 2006.
  77. Takuya Hamada, Munehisa Sekikawa, Yoshihiko Horio, and Kazuyuki Aihara, "IC implementations of Shinriki's and Inaba's chaotic circuits," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 1067-1070, Sept. 2006.
  78. Yoshihiko Horio and Kazuyuki Aihara, "A mixed analog/digital chaotic neuro-computer hardware system and its applications," in Proceedings of International Conference on Dynamics, Vibration and Control, CD-ROM, Aug. 2006.
  79. Naoki Ogawa, Yoshihiko Horio, and Kazuyuki Aihara, "Parallel algorithms for chaotic exponential tabu search for quadratic assignment problems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 309-312, Oct. 2005.
  80. Tomoumi Yagasaki, Yoshihiko Horio, and Kazuyuki Aihara, "One-dimensional discrete-time dynamical systems circuit using floating-gate MOS peaking current sink/source," in Proceedings of European Conference on Circuit Theory and Design, CD-ROM, Aug. 2005.
  81. Koji Mori, Yoshihiko Horio, and Kazuyuki Aihara, "Improved chaotic neuro-computer with output-coding for quadratic assignment problems," in Proceedings of International Joint Conference on Neural Networks, pp. 3312-3317, July 2005.
  82. Takafumi Matsuura, Tohru Ikeguchi, and Yoshihiko Horio, "A tabu search and chaotic search for extracting motifs from DNA sequences," in Proceedings of the 6th Metaheuristics International Conference, pp. 677-682, Aug. 2005.
  83. Koji Mori, Yoshihiko Horio, and Kazuyuki Aihara, "A chaotic neuro-computer system for quadratic assignment problems with output coding," in Proceedings of RISP International Workshop on Nonlinear Circuit and Signal Processing, pp. 147-150, March 2005.
  84. Satoshi Matsui, Yoshihiko Horio, and Kazuyuki Aihara, "Parameter setting for chaos driven tabu search hardware system," in Proceedings of RISP International Workshop on Nonlinear Circuit and Signal Processing, pp. 151-154, March 2005.
  85. Tomoumi Yagasaki, Yoshihiko Horio, and Kazuyuki Aihara, "One-dimensional discrete-time dynamical systems circuit using floating-gate inverter circuit," in Proceedings of RISP International Workshop on Nonlinear Circuit and Signal Processing, pp. 155-158, March 2005.
  86. Yoshihiko Horio, Takahide Okuno, and Koji Mori, "Switched-capacitor large-scale chaotic neuro-computer prototype and chaotic search dynamics," in Proceedings of International Conference on Knowledge-Based Intelligent Information and Engineering Systems, vol. 1, pp. 988-994, Sept. 2004.
  87. Yoshihiko Horio, Takahide Okuno, and Koji Mori, "Mixed analog/digital chaotic neuro-computer prototype: 400-neuron dynamical associative memory," in Proceedings of International Joint Conference on Neural Networks, vol. 3, pp. 1717-1722, July 2004.
  88. Satoshi Matsui, Yukihiro Kobayashi, K. Watanabe, and Yoshihiko Horio, "Exponential chaotic tabu search hardware for quadratic assignment problems using switched-current chaotic neuron IC," in Proceedings of International Joint Conference on Neural Networks, vol. 3, pp. 2221-2226, July 2004.
  89. Koji Mori, Takahide Okuno, and Yoshihiko Horio, "Chaotic neuro-computer prototype for quadratic assignment problems," in Proceedings of International Joint Conference on Neural Networks, vol. 3, pp. 2227-2232, July 2004.
  90. Koji Mori, Takahide Okuno, and Yoshihiko Horio, "Application of 100-neuron chaotic neuro-computer prototype to quadratic assignment problems," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 277-280, March 2004.
  91. Takahide Okuno, Koji Mori, and Yoshihiko Horio, "Dynamical associative memory using 400-neuron chaotic neuro-computer prototype," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 281-284, March 2004.
  92. Ewin Mardhana, Tohru Ikeguchi, Yoshihiko Horio, Mikio Hasegawa, and Natsuhiro Ichinose, "An integral tabu search for finding DNA motifs," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 323-326, March 2004.
  93. Takafumi Matsuura, Tetsunosin Anzai, Tohru Ikeguchi, Yoshihiko Horio, Mikio Hasegawa, and Natsuhiro Ichinose, "A tabu search for extracting motifs from DNA sequences," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 347-350, March 2004.
  94. Tetsuya Fujiwara and Yoshihiko Horio, "An improved multi-scroll circuit with quasi-floating-gate techniques," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 539-542, March 2004.
  95. Tomomi Yagasaki and Yoshihiko Horio, "Switched-current chaos oscillator using floating-gate MOSFET nonlinear resistor," in Proceedings of International Workshop on Nonlinear Circuits and Signal Processing, pp. 543-545, March 2004.
  96. Tomomi Yagasaki, Masayuki Okubo, and Yoshihiko Horio, "A one-dimensional discrete-time dynamical systems circuit using floating-gate MOSFET nonlinear resistor," in Proceedings of European Conference on Circuit Theory and Design, vol. II, pp. 153-156, Sept. 2003.
  97. Hiroshi Akima, Yoshihiko Horio, Alexander Dec, and Ken Suyama, "Intuitive graphical approach for modeling high-frequency effects of IC packages and bond wires," in Proceedings of European Conference on Circuit Theory and Design, vol. III, pp. 37-40, Sept. 2003.
  98. Yukihiro Kobayashi, Takehiko Koyama, Satoshi Matsui, and Yoshihiko Horio, "Mixed analog/digital system for quadratic assignment problems," in Proceedings of International Joint Conference on Neural Networks, pp. 2349-2353, July 2003.
  99. Takuya Taniguchi, Yoshihiko Horio, and Kazuyuki Aihara, "Integrated pulse neuron circuit for asynchronous pulse neural networks," in Proceedings of International Joint Conference on Neural Networks, pp. 942-947, July 2003.
  100. Tetsuya Fujiwara, Yoshihiko Horio, and Kazuyuki Aihara, "An integrated multi-scroll circuit with floating-gate MOSFETs," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. III, pp. 180-183, May 2003.
  101. Tetsuya Fujiwara, Yoshihiko Horio, and Kazuyuki Aihara, "An integrated double-scroll circuit using floating-gate MOSFETs," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 801-904, Oct. 2002.
  102. Junpei Shinozaki, Yoshihiko Horio, and Kazuyuki Aihara, "A coding scheme for asynchronous pulse transmission," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 849-852, Oct. 2002.
  103. Tetsuya Taniguchi, Yoshihiko Horio, and Kazuyuki Aihara, "An IC implementation of the asynchronous pulse neuron model," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, pp. 921-924, Oct. 2002.
  104. Kenji Goto, Alexander Dec, Yoshihiko Horio, Ken Suyama, and Hiroshi Aikima, "IC package and bonding wire modeling software and its application to RFIC design," in Proceedings of IEEE International Microwave Symposium, pp. 2109-2112, June 2002.
  105. Kentaro Tanaka, Yoshihiko Horio, and Kazuyuki Aihara, "A modified algorithm for the quadratic assignment problem using chaotic-neuro-dynamics for VLSI implementation," in Proceedings of International Joint Conference on Neural Networks, pp. 240-245, July 2001.
  106. Kinya Matsuda, Yoshihiko Horio, and Kazuyuki Aihara, "A simulated LC oscillator using multi-input floating-gate MOSFETs," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 3, pp. 763-766, May 2001.
  107. Shinya Nagata and Yoshihiko Horio, "Influences of anti-aliasing filter on estimation of the largest Lyapunov exponent," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 3, pp. 381-384, May 2001.
  108. Yaeko Kitahara, Fusa Nakayama, Yoshihiko Horio, Kasuyuki Aihara, and Minoru Tsukada, "Analysis of learning rule based on spatial coincidence and time history," in Proceedings of International Conference  on Neural Information Processing and Intelligent Information Systems, CD-ROM, Nov. 2000.
  109. Masaya Takano and Yoshihiko Horio, "An analog neuron circuit for a spatio-temporal learning neural network," in Proceedings of International Conference on Neural Information Processing and Intelligent Information Systems, CD-ROM, Nov. 2000.
  110. Hiroshi Hayashi, Yoshihiko Horio, and Kazuyuki Aihara, "A mixed analog/digital circuit for quadratic assignment problems," in Proceedings of Fifth International Symposium on Artificial Life and Robotics, vol. 1, pp. 169-172, Jan. 2000.
  111. Masaaki Yoneda, Izumi Kobayashi, Ou Yamamoto, Yoshihiko Horio, and Kazuyuki Aihara, "A switched-capacitor chaotic neuro-computer: Medium-scale implementation," in Proceedings of Fifth International Symposium on Artificial Life and Robotics, vol. 1, pp. 173-176, Jan. 2000.
  112. Izumi Kobayashi, Masato Kawakami, Yoshihiko Horio, and Kazuyuki Aihara, "Two schemes of switched-capacitor chaotic neuron circuits with bipolar/unipolar output function," in Proceedings of International Conference on Neural Information Processing and Intelligent Information Systems, vol. 3, pp. 1033-1038, Nov. 1999.
  113. Yoshihiko Horio, Izumi Kobayashi, Masato Kawakami, Hiroshi Hayashi, and Kazuyuki Aihara, "Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functions," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 5, pp. 438-441, May 1999.
  114. Yoshihiko Horio, Izumi Kobayashi, Masato Kawakami, Hiroshi Hayashi, and Kazuyuki Aihara, "Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functions," in Proceedings of International Conference on Microelectronics for Neural, Fuzzy, and Bio-Inspired Systems, pp. 267-274, April 1999.
  115. Yoshihiko Horio, Izumi Kobayashi, Hiroshi Hayashi, and Kazuyuki Aihara, "IC implementation of a multi-internal-state chaotic neuron model with unipolar and bipolar output functions," in Proceedings of Fourth International Symposium on Artificial Life and Robotics, vol. 1, pp. 90-93, Jan. 1999.
  116. Nobuo Kanou, Yoshihiko Horio, and Kazuyuki Aihara, "IC implementation of switched-current chaotic neural network and its experimental observations," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 2, pp. 563-566, Sept. 1998.
  117. Izumi Kobayashi, Yoshihiko Horio, and Kazuyuki Aihara, "Switched-capacitor chaotic neuron circuit with unipolar/bipolar output function," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 3, pp. 887-890, Sept. 1998.
  118. Kenichi Watarai, Yoshihiko Horio, and Kazuyuki Aihara, "A non-linear negative resistance circuit using capacitive-coupled multi-input MOSFETs," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 2, pp. 659-662, Sept. 1998.
  119. Hiroshi Hayashi, Yoshihiko Horio, and Kazuyuki Aihara, "Switched-capacitor chaotic neuron circuit with three internal states," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 2, pp. 479-482, Sept. 1998.
  120. Yoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, and Kazuyuki Aihara, "An asynchronous pulse neural network model and its analog IC implementation," in Proceedings of International Conference on Electronics, Circuits and Systems, vol. 3, pp. 301-304, Sept. 1998.
  121. Rubén Herrera, Ken Suyama, and Yoshihiko Horio, "IC implementation of a current-mode chaotic neuron," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 3, pp. 546-549, May 1998.
  122. Yoshihiko Horio, Mitsuru Hanagata, and Kazuhide Yasuda, "An asynchronous pulse neural network model and its analog circuit implementation," in Proceedings of Third International Symposium on Artificial Life and Robotics, vol. 1, pp. 336-341, Jan. 1998.
  123. Kazuhide Yasuda, Mitsuru Hanagata, Ryuji Kasahara, and Yoshihiko Horio, "Analog circuit implementation of asynchronous pulse neural network model," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 2, pp. 853-856, Nov. 1997.
  124. Mitsuru Hanagata and Yoshihiko Horio, "A modified asynchronous pulse neural network model for VLSI implementation," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 2, pp. 849-852, Nov. 1997.
  125. Rubén Herrera, Yoshihiko Horio, and Ken Suyama, "Realizing the chaotic neuron model: IC solutions," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 625-628, Nov. 1997.
  126. Fumiaki Uesugi, Yuji Tanaka, and Yoshihiko Horio, "Influence of non-ideal characteristics of A/D converter on estimation of the Lyapunov exponent from one-dimensional dynamical systems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 453-456, Nov. 1997.
  127. Yuji Tanaka and Yoshihiko Horio, "Influences of noise and quantization on estimation of the Lyapunov exponents from multidimensional dynamical systems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 449-452, Nov. 1997.
  128. Mitsuru Hanagata and Yoshihiko Horio, "An asynchronous pulse neural network model with finite pulse width for VLSI implementation," in Proceedings of International  Conference on Neural Information Processing and Intelligent Information Systems, vol. 1, pp. 26-29, Nov. 1997.
  129. Yuji Tanaka and Yoshihiko Horio, "An estimation algorithm of the Lyapunov exponents from data with noise and/or quantization," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2, pp. 785-788, June 1997.
  130. Mitsuru Hanagata and Yoshihiko Horio, "A modified asynchronous chaotic neural network model for VLSI implementation," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 1, pp. 657-660, June 1997.
  131. Yoshihiko Horio and Ken Suyama, "Analog integrated chaotic neuron circuit and its applications," in Proceedings of International Symposium on Artificial Life and Robotics, vol. 1, pp. 136-141, Feb. 1997.
  132. Yuji Tanaka, Koji Horikawa, Naoko Imamura, and Yoshihiko Horio, "An estimation algorithm of the Lyapunov exponents from noisy and quantized data," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 305-308, Oct. 1996.
  133. Mitsuru Hanagata, Kentaro Neshiba, and Yoshihiko Horio, "Asynchronous chaotic neural network model with finite pulse width," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 265-268, Oct. 1996.
  134. Nobuo Kanou and Yoshihiko Horio, "Switched-current chaotic neural network with chaotic simulated annealing," in Proceedings of International Conference on Neural Networks, vol. 6, pp. 3146-3149, Nov. 1995.
  135. Yoshihiko Horio, Nobuo Kanou, and Ken Suyama, "Switched-capacitor and switched-current chaotic neural networks for combinatorial optimization problems," in Proceedings of International Symposium on Nonlinear Theory and Its Applications, vol. 1, pp. 1-6, Dec. 1995.
  136. Nobuo Kanou and Yoshihiko Horio, "Design of current-mode transiently chaotic neural networks for traveling salesman problem," in Proceedings of INNS World Congress on Neural Networks, vol. 1, pp. 282-285, July 1995.
  137. Yoshihiko Horio and Ken Suyama, "Dynamical associative memory using integrated switched-capacitor chaotic neurons," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 1, pp. 429-432, April 1995.
  138. Yoshihiko Horio and Ken Suyama, "IC implementation of chaotic neuron and its application to synchronization of chaos," in Proceedings of International Symposium on Nonlinear Theory and its Applications, pp. 185-188, Oct. 1994.
  139. Nobuo Kanou, Yoshihiko Horio, and Shogo Nakamura, "Current-mode chaotic neuron with PWL output function for traveling salesman problem," in Proceedings of the 37rd Midwest Symposium on Circuits and Systems, vol. 2, pp. 511-514, Aug. 1994.
  140. Yoshihiko Horio and Ken Suyama, "Switched-capacitor chaotic neural networks for traveling salesman problem," in Proceedings of INNS World Congress on Neural Networks, vol. 4, pp. 690-696, June 1994.
  141. Yoshihiko Horio and Ken Suyama, "IC implementation of switched-capacitor chaotic neuron," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 6 of 6, pp.97-100, May 1994.
  142. Yoshihiko Horio and Ken Suyama, "Analog IC implementation of chaotic neuron model," in Proceedings of the International Conference on Dynamical Systems and Chaos, N. Aoki, N. Shirakawa, and Y. Takahashi eds., vol. 1, pp. 323-326, World Scientific, May 1994.
  143. Nobuo Kanou, Yoshihiko Horio, Kazuyuki Aihara, and Shogo Nakamura, "Chaotic neuron circuits using switched-current integrator," in Proceedings of 1993 International Symposium on Nonlinear Theory and its Applications, vol. 4, pp. 1307-1310, Dec. 1993.
  144. Yoshihiko Horio and Ken Suyama, "Switched-capacitor chaotic neuron for chaotic neural networks," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2 of 4, pp. 1018-1021, May 1993.
  145. Akiyoshi Kawahashi, Shogo Nakamura, Yoshihiko Horio, and Yukio Kadowaki, "Architecture of a high speed hierarchical structure transversal filter," in IEEE Proceedings of the International Conference on Systems Engineering, pp. 344-347, Sept. 1992.
  146. Nobuo Kanou, Yoshihiko Horio, Kazyuki Aihara, and Shogo Nakamura, "A current-mode circuit of a chaotic neuron model," in Proceedings of the 35rd Midwest Symposium on Circuits and Systems, vol. 2, pp. 1530-1533, Aug. 1992.
  147. Ayumu Kobayashi, Yoshihiko Horio, and Shogo Nakamura, "Sinusoidal switched-current oscillators," in Proceedings of the 34rd Midwest Symposium on Circuits and Systems, vo. 1, pp. 299-302, May 1991.
  148. Akiyoshi Kawahashi, Shogo Nakamura, Yoshihiko Horio, and Yukio Kadowaki, "A simple method for designing a hierarchical structure transversal filter," in Proceedings of IEEE International Conference on Acoustic Signal and Speech Processing, pp. 1993-1996, April 1991.
  149. Shogo Nakamura, Syuuji Kurokawa, Yoshihiko Horio, and Makoto Kotani, "A noise reduction for speech recognition systems," in Proceedings of 5th European Signal Processing Conference, pp. 1315-1318, Sept. 1990.
  150. Hiroyuki Sugawara, Shogo Nakamura, Yoshihiko Horio, and Masahide Yoneyama, "A new pre-processing filter for a network based speech recognition," in Proceedings of 5th European Signal Processing Conference, pp. 1247-1250, Sept. 1990.
  151. Hiroyuki Wasaki, Yoshihiko Horio, and Shogo Nakamura, "A localized learning rule for analog VLSI implementation of neural networks," in Proceedings of the 33rd Midwest Symposium on Circuits and Systems, vol. 1, pp. 17-20, Aug. 1990.
  152. Yoshihiko Horio, Masahiro Yamamoto, and Shogo Nakamura, "Active analog memories for VLSI analog neural networks," in Proceedings of International Conference on Fuzzy Logic and Neural Networks, vol. 2, pp. 655-659, July 1990.
  153. Yoshihiko Horio, Masahiro Yamamoto, and Shogo Nakamura, "Active analog memories for neuro-computing," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 4 of 4, pp. 2986-2989, May 1990.
  154. Hiroyuki Takase, Yoshihiko Horio, and Shogo Nakamura, "Speech recognition algorithm based on a switched capacitor network system," in Proceedings of IEE European Conference on Circuit Theory and Design, pp. 492-496, Sept. 1989.
  155. Yoshihiko Horio, Hiroyuki Takase, and Shogo Nakamura, "CMOS connection weight and learning circuits for VLSI adaptive PDP networks," in Proceedings of International Conference on Circuits and Systems, pp. 87-90, July 1989.
  156. Yoshihiko Horio, Hiroyuki Takase, and Shogo Nakamura, "Switched-capacitor preprocessor for speech processing using SC CIC filter," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2 of 3, pp. 1311-1314, May 1989.
  157. Shogo Nakamura, Yoshihiko Horio, and Shinji Yasuda, "A realization of a FIR filter without a multiplier," in Proceedings of 4th European Signal Processing Conference, pp. 707-709, Sept. 1988.
  158. Yoshihiko Horio, Shogo Nakamura, Hajime Miyasaka, and Hiroyuki Takase, "Speech recognition network with SC neuron-like components," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 1 of 3, pp. 495-498, June 1988.
  159. Yoshihiko Horio and Shinsaku Mori, "SC bilinear band-elimination ladder filter design using BI/BD pair," in Proceedings of 30th Midwest Symposium on Circuits and Systems, pp. 937-940, Aug. 1988.
  160. Chinatsu Ikeda, Yoshihiko Horio, and Shinsaku Mori, "SC bilinear band-elimination ladder filters with extended biquad," in Proceedings of 30th Midwest Symposium on Circuits and Systems, pp. 971-974, Aug. 1988.
  161. Yoshihiko Horio and Shinsaku Mori, "Switched capacitor impedance simulation circuit and resulting new kinds of impedances," in Proceedings of 29th Midwest Symposium on Circuits and Systems, pp. 608-611, Aug. 1986.
  162. Hideaki Seki, Yoshihiko Horio, and Shinsaku Mori, "New design technique of V/F and F/V converters based on switched-capacitor technology and their applications," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 3 of 3, pp. 1282-1285, May 1986.
  163. Yoshihiko Horio and Shinsaku Mori, "LDD design of switched-capacitor high-pass ladder filters," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2 of 3, pp. 612-613, May 1986.
  164. Yoshihiko Horio, Masahiro Yamamoto, and Shinsaku Mori, "Switched capacitor general impedance converter," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2 of 3, pp. 789-792, June 1985.
  165. Yoshihiko Horio, Masahiro Yamamoto, and Shinsaku Mori, "Switched capacitor general impedance converter with unity gain buffers," in Proceedings of ETAN and IEEE The 5th International Symposium on Network Theory, pp. 272-277, Sept. 1984.
  166. Yoshihiko Horio, Masahiro Yamamoto, and Shinsaku Mori, "Oscillator applications of SC-GIC," in Proceedings of 27th Midwest Symposium on Circuits and Systems, vol. I, pp. 348-351, June 1984.
  167. Yoshihiko Horio, Hideaki Seki, Masahiro Yamamoto, and Shinsaku Mori, "Sinusoidal switched capacitor oscillator with minimum constructing elements," in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 3 of 3, pp. 1161-1164, May 1983.